CPU Latency Timer
Common Options : Enabled, Disabled
Quick Review
The CPU Latency Timer BIOS feature allows you to control how the processor should handle a deferrable processor operation when there is a new request for the processor. By default, it is disabled.
When disabled, the processor will immediately defer all deferrable operations when there is a new processor request.
When enabled, the processor will defer those operations only after they have been held in a Snoop Stall for 31 clock cycles when the new processor request arrives.
It is recommended that you enable this BIOS feature to ensure that deferrable operations are given sufficient time to complete. This improves performance by allowing deferrable operations to be processed without excessive delay.
Details
Whenever there is a new request for the processor, the processor bus will assert the ADS# (Address Strobe) to signal that new request. By default, if the processor has a deferrable operation in the queue, it will immediately defer that operation for the new request.
This allows the processor to prioritize the queue according to requests that must be processed without delay and those that can be deferred. However, this system may cause deferrable requests to be delayed for too long.
[adrotate group=”1″]This is where the CPU Latency Timer comes in. This BIOS feature allows you to control how the processor should handle a deferrable processor operation when there is a new request for the processor. By default, it is disabled.
When disabled, the processor will immediately defer all deferrable operations when there is a new processor request.
When enabled, the processor will defer those operations only after they have been held in a Snoop Stall for 31 clock cycles when the new processor request arrives. In the other words, the processor will not defer those operations even when a new processor request arrives, unless they have had a period of at least 31 clock cycles to be processed.
It is recommended that you enable this BIOS feature to ensure that deferrable operations are given sufficient time to complete. This improves performance by allowing deferrable operations to be processed without excessive delay.
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