Tag Archives: Hyperscale computing

IBM z16 : Industry's First Quantum-Safe System Explained!

IBM z16 : Industry’s First Quantum-Safe System Explained!

IBM just introduced the z16 system, powered by their new Telum processor with an integrated AI accelerator!

Take a look at the z16, and find out why it is the industry’s first quantum-safe system!

 

IBM z16 : Industry’s First Quantum-Safe System!

On 25 April 2022, IBM officially unveiled their new z16 system in Malaysia – the industry’s first quantum-safe system.

IBM Vice President for Worldwide Sales of IBM Z and LinuxONE, Jose Castano, flew to Kuala Lumpur, to give us an exclusive briefing on the new z16 system, and tell us why it is the industry’s first quantum-safe system.

IBM Z and LinuxONE Security CTO Michael Jordan also briefed us on why quantum-safe computing will be critical for enterprises, as quantum computing improves.

Thanks to its Telum processor, the IBM z16 system delivers low and consistent latency for embedding AI into response time-sensitive transactions. This can enable customers to leverage AI inference to better control the outcome of transactions before they complete.

For example, they can leverage AI inference to mitigate risk in Clearing & Settlement applications, to predict which transactions have high risk exposure, and highlight questionable transactions, to prevent costly consequences.

In a use-case example, one international bank uses AI on IBM Z as part of their credit card authorization process instead of using an off-platform inference solution. As a result, the bank can detect fraud during its credit card transaction authorisation processing.

The IBM z16 will offer better AI inference capacity, thanks to its integrated AI accelerator offering up to 1 ms of latency, expanding use cases that include :

  • tax fraud and organised retail theft detection
  • real-time payments and alternative payment methods, including cryptocurrencies
  • speed up business or consumer loan approvals

As the industry’s first quantum-safe system, the IBM z16 is protected by lattice-based crypto graphs – an approach for constructing security primitives that help protect data and systems against current and future threats.

 

IBM z16 : Powered By The New Telum Processor!

The IBM z16 is built around the new IBM Telum processor, which is specifically designed for secure processing, and real-time AI inference.

Here are the key features of the IBM Telum processor that powers the new IBM z16 system :

  • Fabricated on the 7 nm process technology
  • Has 8 processor cores, clocked at over 5 GHz
  • Each processor core has a dedicated 32 MB private L2 cache
  • The eight 32 MB L2 cache can form a virtual 256 MB L3 cache, and a 2 GB L4 cache.
  • Transparent encryption of main memory, with 8-channel fault tolerant memory interface
  • Integrated AI accelerator with 6 TFLOPS compute capacity
  • Centralised AI accelerator architecture, with direct connection to the cache infrastructure

The Telum processor is designed to enable extremely low latency inference for response-time sensitive workloads. With planned system support for up to 200 TFLOPs, the AI acceleration is also designed to scale up to the requirements of the most demanding workloads.

Thanks to the Telum processor, the IBM z16 can process 300 billion inference requests per day, with just one millisecond of latency.

 

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The AMD Opteron A1100 Technology Report

AMD today officially launched the AMD Opteron A1100 System-on-Chip (SoC). Formerly codenamed “Seattle“, the AMD Opteron A1100 is the first AMD device to use the 64-bit ARMv8-A processor microarchitecture, instead of the usual x86 microarchitecture.

The ARMv8-A microarchitecture allows for a more energy-efficient device, but their unfamiliarity with it may have been the reason why the Opteron A1100 was delayed almost 18 months.Today’s launch marks the end of that protracted development process.

 

The AMD Opteron A1100 Revealed

The AMD Opteron A1100 was designed around the ARM Cortex-A57 processor cores to deliver better power efficiency and lower costs. Coupled with enterprise-class features, AMD is hoping that it will allow them to penetrate the datacenter or hyperscale computing market.

The AMD Opteron A1100 processor will feature up to 8 ARM Cortex-A57 processor cores, backed by up to 4 MB of shared L2 cache and a large 8 MB L3 cache. Its dual-channel memory controller supports up to 128 GB of DDR3 or DDR4 memory.

Connectivity-wise, it supports two 1o Gb Ethernet ports, a single PCI Express 3.0 slot and up to 14 SATA3 devices. Take a look at the Opteron A1100 chip diagram

Here are the market segments that AMD plans to target with the Opteron A1100 SoC. Basically anyone who wants a cheap, efficient SoC for massive deployments.

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To support those solutions, AMD has already prepared a complete solution stack. This is what probably took them so long to qualify the Opteron A1100 for the enterprise market.

In the next page, we will take a look at the three new Opteron A1100 models AMD launched today… Click here!

Next Page > AMD Opteron A1100 Model, Package, Memory Support

 

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AMD Opteron A1100 Model & Package Details

AMD will initially offer 3 models – the AMD Opteron A1170, the AMD Opteron A1150 and the AMD Opteron A1120. Here are their key specifications :

Whether they come with 4 or 8 processor cores, all Opteron A1100 processors will have the same SP1 package, because they are all the same chip. The quad-core models will just have half the cores disabled.

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AMD Opteron A1100 Memory Support

To cater to the enterprise market, the AMD Opteron A1100 will support both DDR3 and DDR4 memory in three different interfaces – UDIMM, RDIMM and SO-DIMM.

Basically, the AMD Opteron A1100 will support memory speeds up to 1866 MHz for DDR4 memory, and 1600 MHz for DDR3 memory. You can run them in single- or dual-channel modes using up to 4 memory modules.

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