Tag Archives: Errata

Errata 123 Option – The BIOS Optimization Guide

Errata 123 Option

Common Options : Auto, Enabled, Disabled

 

Quick Review of Errata 123 Option

Errata 123 refers to the 123rd bug identified in AMD Athlon and Opteron processors. This bug affects the cache bypass feature in those processors.

These processors have an internal data path that allows the processor to bypass the L2 cache and initiate an early DRAM read for certain cache line fill requests, even before receiving the hit/miss status from the L2 cache.

However, at low core frequencies, the DRAM data read may reach the processor core before it is ready. This causes data corruption and/or the processor to hang.

This bug affects the following processor families :

  • Dual core AMD Opteron (Socket 940 and Socket 939) processors
  • AMD Athlon 64 X2 (Socket 939) processors

The Errata 123 Option BIOS feature is a workaround for the bug. It allows you to disable the cache bypass feature and avoid the bug from manifesting.

When enabled, the processor will not bypass the L2 cache to prefetch data from the system memory.

When disabled, the processor will continue to bypass the L2 cache for certain cache line fill requests. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or corrupting data. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

 

Details of Errata 123 Option

As processors get more and more complex, every new processor design inevitably comes with a plethora of bugs. Those that are identified are given errata numbers.

Errata 123 refers to the 123rd bug identified in AMD Athlon and Opteron processors. This bug affects the cache bypass feature in those processors.

These processors have an internal data path that allows the processor to bypass the L2 cache and initiate an early DRAM read for certain cache line fill requests, even before receiving the hit/miss status from the L2 cache.

However, at low core frequencies, the DRAM data read may reach the processor core before it is ready. This causes data corruption and/or the processor to hang.

This bug is present in AMD’s processor revisions of JH-E1BH-E4 and JH-E6. These revisions affect the following processor families :

  • Dual core AMD Opteron (Socket 940 and Socket 939) processors[adrotate group=”2″]
  • AMD Athlon 64 X2 (Socket 939) processors

The processor families that are not affected are :

  • Single core AMD Opteron (Socket 940) processors
  • AMD Athlon 64 (Socket 754, 939) processors
  • AMD Athlon 64 FX (Socket 940, 939) processors
  • Mobile AMD Athlon 64 (Socket 754) processors
  • AMD Sempron (Socket 754, 939) processors
  • Mobile AMD Sempron (Socket 754) processors
  • Mobile AMD Athlon XP-M (Socket 754) processors
  • AMD Turion processors

The Errata 123 Option BIOS feature is a workaround for the bug. It allows you to disable the cache bypass feature and avoid the bug from manifesting.

When enabled, the processor will not bypass the L2 cache to prefetch data from the system memory.

When disabled, the processor will continue to bypass the L2 cache for certain cache line fill requests. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or corrupting data. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

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Errata 123 Enhancement – The BIOS Optimization Guide

Errata 123 Enhancement

Common Options : Auto, Enabled, Disabled

 

Quick Review

Errata 123 refers to the 123rd bug identified in AMD Athlon and Opteron processors. This bug affects the cache bypass feature in those processors.

These processors have an internal data path that allows the processor to bypass the L2 cache and initiate an early DRAM read for certain cache line fill requests, even before receiving the hit/miss status from the L2 cache.

However, at low core frequencies, the DRAM data read may reach the processor core before it is ready. This causes data corruption and/or the processor to hang.

This bug affects the following processor families :

  • Dual Core AMD Opteron (Socket 940, 939)
  • AMD Athlon 64 X2 (Socket 939)

The Errata 123 BIOS feature is a workaround for the bug. It allows you to disable the cache bypass feature and avoid the bug from manifesting.

When enabled, the processor will not bypass the L2 cache to prefetch data from the system memory.

When disabled, the processor will continue to bypass the L2 cache for certain cache line fill requests. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or corrupting data. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

 

Details

As processors get more and more complex, every new processor design inevitably comes with a plethora of bugs. Those that are identified are given errata numbers.

Errata 123 refers to the 123rd bug identified in AMD Athlon and Opteron processors. This bug affects the cache bypass feature in those processors.

These processors have an internal data path that allows the processor to bypass the L2 cache and initiate an early DRAM read for certain cache line fill requests, even before receiving the hit/miss status from the L2 cache.

However, at low core frequencies, the DRAM data read may reach the processor core before it is ready. This causes data corruption and/or the processor to hang.

This bug is present in AMD’s processor revisions of JH-E1, BH-E4 and JH-E6. These revisions affect the following processor families :

[adrotate banner=”4″]
  • Dual Core AMD Opteron (Socket 940, 939)
  • AMD Athlon 64 X2 (Socket 939)

The processor families that are not affected are :

  • AMD Opteron (Socket 940)
  • AMD Athlon 64 (Socket 754, 939)
  • AMD Athlon 64 FX (Socket 940, 939)
  • Mobile AMD Athlon 64 (Socket 754)
  • AMD Sempron (Socket 754, 939)
  • Mobile AMD Sempron (Socket 754)
  • Mobile AMD Athlon XP-M (Socket 754)
  • AMD Turion Mobile Technology

The Errata 123 BIOS feature is a workaround for the bug. It allows you to disable the cache bypass feature and avoid the bug from manifesting.

When enabled, the processor will not bypass the L2 cache to prefetch data from the system memory.

When disabled, the processor will continue to bypass the L2 cache for certain cache line fill requests. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or corrupting data. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

 

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If you like our work, you can help support our work by visiting our sponsors, participating in the Tech ARP Forums, or even donating to our fund. Any help you can render is greatly appreciated!

Errata 94 Enhancement – The BIOS Optimization Guide

Errata 94 Enhancement

Common Options : Enabled, Disabled

 

Quick Review

Errata 94 refers to the 94th bug identified in AMD Athlon and Opteron processors. This bug affects the sequential prefetch feature in those processors.

When there’s an instruction cache miss, the sequential prefetch mechanism in affected processors may incorrectly prefetch the next sequential cache line. This may cause the processor to hang. Affected 64-bit processors that run 32-bit applications may end up executing incorrect code.

This bug affects the following processor families :

  • AMD Opteron (Socket 940)
  • AMD Athlon 64 (Socket 754, 939)
  • AMD Athlon 64 FX (Socket 940, 939)
  • Mobile AMD Athlon 64 (Socket 754)
  • AMD Sempron (Socket 754, 939)
  • Mobile AMD Sempron (Socket 754)
  • Mobile AMD Athlon XP-M (Socket 754)

This BIOS feature is a workaround for the bug. It allows you to disable the sequential prefetch mechanism and avoid the bug from manifesting.

When enabled, the BIOS will disable the processor’s sequential prefetch mechanism for any software that operates in Long Mode.

When disabled, the BIOS will not disable the processor’s sequential prefetch mechanism. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or processing incorrect code. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

 

Details

As processors get more and more complex, every new processor design inevitably comes with a plethora of bugs. Those that are identified are given errata numbers.

Errata 94 refers to the 94th bug identified in AMD Athlon and Opteron processors. This bug affects the sequential prefetch feature in those processors.

When there’s an instruction cache miss, the sequential prefetch mechanism in affected processors may incorrectly prefetch the next sequential cache line. This may cause the processor to hang. Affected 64-bit processors that run 32-bit applications may end up executing incorrect code.

This bug is present in AMD’s processor revisions of SH-B3, SH-C0, SH-CG, DH-CG and CH-CG. These revisions affect the following processor families :

[adrotate banner=”4″]
  • AMD Opteron (Socket 940)
  • AMD Athlon 64 (Socket 754, 939)
  • AMD Athlon 64 FX (Socket 940, 939)
  • Mobile AMD Athlon 64 (Socket 754)
  • AMD Sempron (Socket 754, 939)
  • Mobile AMD Sempron (Socket 754)
  • Mobile AMD Athlon XP-M (Socket 754)

The processor families that are not affected are :

  • Dual Core AMD Opteron
  • AMD Athlon 64 X2
  • AMD Turion Mobile Technology

This BIOS feature is a workaround for the bug. It allows you to disable the sequential prefetch mechanism and avoid the bug from manifesting.

When enabled, the BIOS will disable the processor’s sequential prefetch mechanism for any software that operates in Long Mode.

When disabled, the BIOS will not disable the processor’s sequential prefetch mechanism. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or processing incorrect code. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

 

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If you like our work, you can help support our work by visiting our sponsors, participating in the Tech ARP Forums, or even donating to our fund. Any help you can render is greatly appreciated!

Errata 94 Option – The BIOS Optimization Guide

Errata 94 Option

Common Options : Enabled, Disabled

 

Quick Review

Errata 94 refers to the 94th bug identified in AMD Athlon and Opteron processors. This bug affects the sequential prefetch feature in those processors. This bug affects the following processor families :

  • AMD Opteron (Socket 940)
  • AMD Athlon 64 (Socket 754, 939)
  • AMD Athlon 64 FX (Socket 940, 939)
  • Mobile AMD Athlon 64 (Socket 754)
  • AMD Sempron (Socket 754, 939)
  • Mobile AMD Sempron (Socket 754)
  • Mobile AMD Athlon XP-M (Socket 754)

This BIOS feature is a workaround for the bug. It allows you to disable the sequential prefetch mechanism and avoid the bug from manifesting.

When enabled, the BIOS will disable the processor’s sequential prefetch mechanism for any software that operates in Long Mode.

When disabled, the BIOS will not disable the processor’s sequential prefetch mechanism. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or processing incorrect code. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

 

Details

As processors get more and more complex, every new processor design inevitably comes with a plethora of bugs. Those that are identified are given errata numbers.

Errata 94 refers to the 94th bug identified in AMD Athlon and Opteron processors. This bug affects the sequential prefetch feature in those processors.

When there’s an instruction cache miss, the sequential prefetch mechanism in affected processors may incorrectly prefetch the next sequential cache line. This may cause the processor to hang. Affected 64-bit processors that run 32-bit applications may end up executing incorrect code.

This bug is present in AMD’s processor revisions of SH-B3, SH-C0, SH-CG, DH-CG and CH-CG. These revisions affect the following processor families :

[adrotate banner=”4″]
  • AMD Opteron (Socket 940)
  • AMD Athlon 64 (Socket 754, 939)
  • AMD Athlon 64 FX (Socket 940, 939)
  • Mobile AMD Athlon 64 (Socket 754)
  • AMD Sempron (Socket 754, 939)
  • Mobile AMD Sempron (Socket 754)
  • Mobile AMD Athlon XP-M (Socket 754)

The processor families that are not affected are :

  • Dual core AMD Opteron processors (or newer)
  • AMD Athlon 64 X2 processors (or newer)
  • AMD Turion processors (or newer)

This BIOS feature is a workaround for the bug. It allows you to disable the sequential prefetch mechanism and avoid the bug from manifesting.

When enabled, the BIOS will disable the processor’s sequential prefetch mechanism for any software that operates in Long Mode.

When disabled, the BIOS will not disable the processor’s sequential prefetch mechanism. This improves its performance.

When set to Auto, the BIOS will query the processor to see if it is affected by the bug. If the processor is affected, the BIOS will enable this BIOS feature. Otherwise, it will leave it disabled.

If your processor is affected by this bug, you should enable this BIOS feature to prevent the processor from hanging or processing incorrect code. But if your processor is not affected by this bug, disable this BIOS feature for maximum performance.

[adrotate banner=”5″]

 

Support Tech ARP!

If you like our work, you can help support our work by visiting our sponsors, participate in the Tech ARP Forums, or even donate to our fund. Any help you can render is greatly appreciated!