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CPU Hardware Prefetch - The BIOS Optimization Guide

CPU Hardware Prefetch – The BIOS Optimization Guide

CPU Hardware Prefetch - The BIOS Optimization Guide

CPU Hardware Prefetch

Common Options : Enabled, Disabled

 

Quick Review

The processor has a hardware prefetcher that automatically analyzes its requirements and prefetches data and instructions from the memory into the Level 2 cache that are likely to be required in the near future. This reduces the latency associated with memory reads.

When enabled, the processor’s hardware prefetcher will be enabled and allowed to automatically prefetch data and code for the processor.

When disabled, the processor’s hardware prefetcher will be disabled.

If you are using a C1 stepping (or older) of the Intel Pentium 4 or Intel Pentium 4 Xeon processor, it is recommended that you enable this BIOS feature so that the hardware prefetcher is enabled for maximum performance.

But if you are using an older version of the Intel Pentium 4 or Intel Pentium 4 Xeon processor, then you should disable the CPU Hardware Prefetch BIOS feature to circumvent the O37 bug which causes data corruption when the hardware prefetcher is operational.

 

Details

CPU Hardware Prefetch is a BIOS feature specific to processors based on the Intel NetBurst microarchitecture (e.g. Intel Pentium 4 and Intel Pentium 4 Xeon).

These processors have a hardware prefetcher that automatically analyzes the processor’s requirements and prefetches data and instructions from the memory into the Level 2 cache that are likely to be required in the near future. This reduces the latency associated with memory reads.

When it works, the hardware prefetcher does a great job of keeping the processor loaded with code and data. However, it doesn’t always work right.

Prior to the C1 stepping of the Intel Pentium 4 and Intel Pentium 4 Xeon, these processors shipped with a bug that causes data corruption when the hardware prefetcher was enabled. According to Intel, Errata O37 causes the processor to “use stale data from the cache while the Hardware Prefetcher is enabled“.

Unfortunately, the only solution for the affected processors is to disable the hardware prefetcher. This is where the CPU Hardware Prefetch BIOS feature comes in.

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When enabled, the processor’s hardware prefetcher will be enabled and allowed to automatically prefetch data and code for the processor.

When disabled, the processor’s hardware prefetcher will be disabled.

If you are using a C1 stepping (or older) of the Intel Pentium 4 or Intel Pentium 4 Xeon processor, it is recommended that you enable this BIOS feature so that the hardware prefetcher is enabled for maximum performance.

But if you are using an older version of the Intel Pentium 4 or Intel Pentium 4 Xeon processor, then you should disable this BIOS feature to circumvent the O37 bug which causes data corruption when the hardware prefetcher is operational.

 

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CPU Adjacent Sector Prefetch – BIOS Optimization Guide

CPU Adjacent Sector Prefetch

Common Options : Enabled, Disabled

 

Quick Review

CPU Adjacent Sector Prefetch is a BIOS feature specific to the Intel processors (from Pentium 4 onwards), including Intel Xeon processors.

When enabled, the processor will fetch the cache line containing the currently requested data, and prefetch the following cache line.

When disabled, the processor will only fetch the cache line containing the currently requested data.

In a desktop system, CPU Adjacent Sector Prefetch improves the processor’s performance since there’s a high probability of the processor requiring the next cache line as well. It is recommended that you enable this BIOS feature in a desktop system.

But in a server, this feature may actually degrade performance since data requests in servers are of a more random nature. You will need to evaluate the performance effect of CPU Adjacent Sector Prefetch on your server and determine if it should be disabled or enabled for better performance. But servers should generally disable this feature.

 

Details

CPU Adjacent Sector Prefetch is a BIOS feature specific to the Intel processors (from Pentium 4 onwards), including Intel Xeon processors. When one of these processors receives data from the cache, it can also prefetch the next 64-byte cache line. This may reduce cache latency by making the next cache line immediately available if the processor requires it as well.

When enabled, the processor will fetch the cache line containing the currently requested data, and prefetch the following cache line.

When disabled, the processor will only fetch the cache line containing the currently requested data.

In a desktop system, CPU Adjacent Sector Prefetch improves the processor’s performance since there’s a high probability of the processor requiring the next cache line as well. It is recommended that you enable this BIOS feature in a desktop system.

But in a server, this feature may actually degrade performance since data requests in servers are of a more random nature. The probability of the next cache line being required by the processor is lower than that of a desktop system. If the processor prefetches the second cache line and it is not required by the processor, it is discarded and the processor requests for the data it needs. This incurs a slight penalty in performance.

You will need to evaluate the performance effect of CPU Adjacent Sector Prefetch on your server and determine if it should be disabled or enabled for better performance. But servers should generally disable this feature.

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If you like our work, you can help support our work by visiting our sponsors, participate in the Tech ARP Forums, or even donate to our fund. Any help you can render is greatly appreciated!