2T Command

Common Options : Enabled, Disabled, Auto

 

Quick Review of 2T Command

The 2T Command BIOS feature allows you to select the delay between the assertion of the Chip Select signal till the time the memory controller starts sending commands to the memory bank. The lower the value, the sooner the memory controller can send commands out to the activated memory bank.

When this feature is disabled, the memory controller will only insert a command delay of one clock cycle or 1T.

When this feature is enabled, the memory controller will insert a command delay of two clock cycles or 2T.

The Auto option allows the memory controller to use the memory module’s SPD value for command delay.

If the SDRAM command delay is too long, it can reduce performance by unnecessarily preventing the memory controller from issuing the commands sooner.

However, if the SDRAM command delay is too short, the memory controller may not be able to translate the addresses in time and the “bad commands” that result will cause data loss and corruption.

It is recommended that you try disabling 2T Command for better memory performance. But if you face stability issues, enable this BIOS feature.

 

Details of 2T Command

Whenever there is a memory read request from the operating system, the memory controller does not actually receive the physical memory addresses where the data is located. It is only given a virtual address space which it has to translate into physical memory addresses. Only then can it issue the proper read commands. This produces a slight delay at the start of every new memory transaction.

Instead of immediately issuing the read commands, the memory controller instead asserts the Chip Select signal to the physical bank that contains the requested data. What this Chip Select signal does is activate the bank so that it is ready to accept the commands. In the meantime, the memory controller will be busy translating the memory addresses. Once the memory controller has the physical memory addresses, it starts issuing read commands to the activated memory bank.

As you can see, the command delay is not caused by any latency inherent in the memory module. Rather, it is determined by the time taken by the memory controller to translate the virtual address space into physical memory addresses.

Naturally, because the delay is due to translation of addresses, the memory controller will require more time to translate addresses in high density memory modules due to the higher number of addresses. The memory controller will also take a longer time if there is a large number of physical banks.

The 2T Command BIOS feature allows you to select the delay between the assertion of the Chip Select signal till the time the memory controller starts sending commands to the memory bank. The lower the value, the sooner the memory controller can send commands out to the activated memory bank.

When this feature is disabled, the memory controller will only insert a command delay of one clock cycle or 1T.

When this feature is enabled, the memory controller will insert a command delay of two clock cycles or 2T.

The Auto option allows the memory controller to use the memory module’s SPD value for command delay.

If the SDRAM command delay is too long, it can reduce performance by unnecessarily preventing the memory controller from issuing the commands sooner.

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However, if the SDRAM command delay is too short, the memory controller may not be able to translate the addresses in time and the “bad commands” that result will cause data loss and corruption.

Fortunately, all unbuffered SDRAM modules are capable of a 1T command delay up to four memory banks per channel. After that, a 2T command delay may be required. However, support for 1T command delay varies from chipset to chipset and even from one motherboard model to another. You should consult your motherboard manufacturer to see if your motherboard supports a command delay of 1T.

It is recommended that you try disabling 2T Command for better memory performance. But if you face stability issues, enable this BIOS feature.

 

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