PCI Chaining
Common Options : Enabled, Disabled
Quick Review of PCI Chaining
The PCI Chaining BIOS feature is designed to speed up writes from the processor to the PCI bus by allowing write combining to occur at the PCI interface.
When PCI chaining is enabled, up to four quadwords of processor writes to contiguous PCI addresses will be chained together and written to the PCI bus as a single PCI burst write.
When PCI chaining is disabled, each processor write to the PCI bus will be handled as separate non-burst writes of 32-bits.
Needless to say, writing four quadwords of data in a single PCI write is much faster than doing so in four separate non-burstable writes. A single PCI burst write will also reduce the amount of time the processor has to wait while writing to the PCI bus.
Therefore, it is recommended that you enable this BIOS feature for better CPU to PCI write performance.
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Details of PCI Chaining
The PCI Chaining BIOS feature is designed to speed up writes from the processor to the PCI bus by allowing write combining to occur at the PCI interface.
When PCI chaining is enabled, up to four quadwords of processor writes to contiguous PCI addresses will be chained together and written to the PCI bus as a single PCI burst write.
When PCI chaining is disabled, each processor write to the PCI bus will be handled as separate non-burst writes of 32-bits.
Needless to say, writing four quadwords of data in a single PCI write is much faster than doing so in four separate non-burstable writes. A single PCI burst write will also reduce the amount of time the processor has to wait while writing to the PCI bus.
Therefore, it is recommended that you enable this BIOS feature for better CPU to PCI write performance.
What Is A Quadword?
In computing, a quadword is a term that means four words, equivalent to 8 bytes or 64-bits.
So a PCI burst write of four quadwords would be 32 bytes, or 256 bits in size. That would be 8X faster than a non-burst write of 4 bytes, or 32 bits in size.
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