DCQ Bypass Maximum
Common Options : Auto, 2X, 4X, 8X, 16X (Athlon 64); Auto, 1X to 15X in 1X increments
The AMD processor's integrated DRAM controller has an arbiter that intelligently schedules memory access requests to improve memory throughput. This improves the overall memory performance but at the expense of some memory accesses which have to be delayed.
The DCQ Bypass Maximum BIOS setting determines how many times the arbiter is allowed to bypass the oldest memory access request in the DRAM controller queue. As this feature greatly improves memory performance, most BIOSes will not include a Disabled setting. Instead, you are allowed to adjust the number of times the arbiter is allowed to bypass the oldest memory access request in the queue.
It is generally recommended that you set this BIOS feature to the maximum value of 16X (Athlon 64) or 15X (Phenom), which would give the memory controller's queue arbiter maximum flexibility in scheduling memory access requests. However, if you face stability issues, especially with time-sensitive applications, reduce the value step-by-step until the problem resolves.
The Auto option, if available, usually sets the bypass limit to the maximum - 16X for the Athlon 64) or 15X for the Phenom or Phenom II processor.
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