Bank Swizzle Mode
Common Options : Enabled, Disabled
Bank Swizzle Mode is a DRAM bank address mode that remaps the DRAM bank address to appear as physical address bits. It does this by using the logical operation, XOR (exclusive or), to create the bank address from the physical address bits.
This effectively interleaves the memory banks and maximizes memory accesses on active rows in each memory bank. It also reduces page conflicts between a cache line fill and a cache line evict in the processor's L2 cache.
When set to Enable, the memory controller will remap the DRAM bank addresses to appear as physical address bits. This improves performance by maximizing memory accesses on active rows and minimizes page conflicts in the processor's L2 cache.
When set to Disable, the memory controller will not remap the DRAM bank addresses.
It is highly recommended that you enable this BIOS feature to improve memory throughput. You should only disable it if you face stability issues after enabling this feature.
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