SDRAM Command Leadoff Time
Common Options : 3, 4
By definition, the command leadoff time is the period between the assertion of the address/command lines and the activation of the target memory bank. This BIOS feature allows you to adjust the command leadoff time to meet timing variances of the motherboard as well as the memory module.
The shorter the leadoff time, the earlier the target bank can be activated. This allows faster access to the data in the memory module. Therefore, it is recommended that you set the SDRAM Command Leadoff Time to 3 clock cycles for better memory performance.
However, your motherboard and memory combination may not be able to support the tighter command leadoff time of 3 clock cycles. If your system becomes unstable with a command leadoff time of 3 clock cycles, revert to the slower command leadoff time of 4 clock cycles.
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