PCI Dynamic Bursting – The BIOS Optimization Guide

PCI Dynamic Bursting - The BIOS Optimization Guide

PCI Dynamic Bursting

Common Options : Enabled, Disabled

 

Quick Review

This BIOS feature is similar to the Byte Merge feature.

When enabled, the PCI write buffer accumulates and merges 8-bit and 16-bit writes into 32-bit writes. This increases the efficiency of the PCI bus and improves its bandwidth.

When disabled, the PCI write buffer will not accumulate or merge 8-bit or 16-bit writes. It will just write them to the PCI bus as soon as the bus is free. As such, there may be a loss of PCI bus efficiency when 8-bit or 16-bit data is written to the PCI bus.

Therefore, it is recommended that you enable PCI Dynamic Bursting for better performance.

However, please note that PCI Dynamic Bursting may be incompatible with certain PCI network interface cards (also known as NICs). So, if your NIC won’t work properly, try disabling this feature.

 

Details

This BIOS feature is similar to the Byte Merge feature.

If you have already read about the CPU to PCI Write Buffer feature, you should know that the chipset has an integrated PCI write buffer which allows the CPU to immediately write up to four words (or 64-bits) of PCI writes to it. This frees up the CPU to work on other tasks while the PCI write buffer writes them to the PCI bus.

Now, the CPU doesn’t always write 32-bit data to the PCI bus. 8-bit and 16-bit writes can also take place. But while the CPU may only write 8-bits of data to the PCI bus, it is still considered as a single PCI transaction. This makes it equivalent to a 16-bit or 32-bit write in terms of PCI bandwidth! This reduces the effective PCI bandwidth, especially if there are many 8-bit or 16-bit CPU-to-PCI writes.

To solve this problem, the write buffer can be programmed to accumulate and merge 8-bit and 16-bit writes into 32-bit writes. The buffer then writes the merged data to the PCI bus. As you can see, merging the smaller 8-bit or 16-bit writes into a few large 32-bit writes reduces the number of PCI transactions required. This increases the efficiency of the PCI bus and improves its bandwidth.

This is where the PCI Dynamic Bursting BIOS feature comes in. It controls the byte merging capability of the PCI write buffer.

If it is enabled, every write transaction will go straight to the write buffer. They are accumulated until there is enough to be written to the PCI bus in a single burst. This improves the PCI bus’ performance.

If you disable byte merging, all writes will still go to the PCI write buffer (if the CPU to PCI Write Buffer feature has been enabled). But the buffer won’t accumulate and merge the data. The data is written to the PCI bus as soon as the bus becomes free. This reduces PCI bus efficiency, particularly when 8-bit or 16-bit data is written to the PCI bus.

Therefore, it is recommended that you enable PCI Dynamic Bursting for better performance.

Please note that like Byte Merge, this feature may not be compatible with certain PCI network interface cards. For more details, please check out the Byte Merge feature.

 

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