CPU to PCI Write Buffer – The BIOS Optimization Guide

CPU to PCI Write Buffer - The BIOS Optimization Guide

CPU to PCI Write Buffer

Common Options : Enabled, Disabled

 

Quick Review

The CPU to PCI Write Buffer BIOS feature controls the chipset’s CPU-to-PCI write buffer. It is used to store PCI writes from the processor before they are written to the PCI bus.

When enabled, all PCI writes from the processor will go directly to the write buffer. This allows the processor to work on something else while the write buffer writes the data to the PCI bus on the next available PCI cycle.

When disabled, the processor bypasses the buffer and writes directly to the PCI bus. This ties up the processor for the entire length of the transaction.

It is recommended that you enable this BIOS feature for better performance.

 

Details

The CPU to PCI Write Buffer BIOS feature controls the chipset’s CPU-to-PCI write buffer. It is used to store PCI writes from the processor before they are written to the PCI bus.

If this buffer is disabled, the processor bypasses the buffer and writes directly to the PCI bus. Although this may seem like the faster and better method, it really isn’t so.

When the processor wants to write to the PCI bus, it has to arbitrate for control of the PCI bus. This takes time, especially when there are other devices requesting access to the PCI bus as well. During this time, the processor cannot do anything else but wait for its turn.

Even when it gets control of the PCI bus, the processor still has to wait until the PCI bus is free. Because the processor bus (which can be as fast as 533 MHz) is many times faster than the PCI bus (at only 33 MHz), the processor wastes many clock cycles just waiting for the PCI bus. And it hasn’t even begun writing to the PCI bus yet! The entire transaction, therefore, puts the processor out of commission for many clock cycles.

This is where the CPU-to-PCI write buffer comes in. It is a small memory buffer built into the chipset. The actual size of the buffer varies from chipset to chipset. But in most cases, it is big enough for four words or 64-bits worth of data.

When this write buffer is enabled, all PCI writes from the processor will go straight into it, instead of the PCI bus. This is virtually instantaneous since the processor does not have to arbitrate or wait for the PCI bus. That task is now left to the chipset and its write buffer. The processor is thus free to work on something else.

It is important to note that the write buffer won’t be able to write the data to the PCI bus any faster than the processor can. This is because the write buffer still has to arbitrate and wait for control of the PCI bus! But the difference here is that the entire transaction can now be carried out without tying up the processor.

To sum it all up, enabling the CPU to PCI write buffer frees up CPU cycles that would normally be wasted waiting for the PCI bus. Therefore, it is recommended that you enable this feature for better performance.

 

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