ACPI SRAT Table – BIOS Optimization Guide

ACPI SRAT Table

ACPI SRAT Table

Common Options : Enabled, Disabled

 

Quick Review

The ACPI Static Resource Affinity Table (SRAT) stores topology information for all the processors and memory, describing the physical locations of the processors and memory in the system. It also describes what memory is hot-pluggable, and what is not.

The operating system scans the ACPI SRAT at boot time and uses the information to better allocate memory and schedule software threads for maximum performance. This BIOS feature controls whether the SRAT is made available to the operating system at boot up, or not.

When enabled, the BIOS will build the Static Resource Affinity Table (SRAT) and allow the operating system to access and use the information to optimize software thread allocation and memory usage.

When disabled, the BIOS will not build the Static Resource Affinity Table (SRAT). Alternative optimizations like Node Memory Interleaving can then be enabled.

If you are using an operating system that supports ACPI SRAT (e.g. Windows Server 2003, Windows XP SP2 with Physical Address Extensions or PAE enabled), it is recommended that you enable this BIOS feature to allow the operating system to dynamically allocate threads and memory according to the SRAT data.

Please note that you must disable Node Memory Interleave if you intend to enable this BIOS feature. Node Memory Interleave is a static optimization that cannot work in tandem with the dynamic optimizations that the operating system can perform using information from the ACPI SRAT.

If you are using an operating system that does not support ACPI SRAT (e.g. Windows 2000, Windows 98 ), it is recommended that you disable this BIOS feature, and possibly enable Node Memory Interleaving instead.

 

Details

Although multiple cores and increased clock speeds have increased computing performance, the processor bus and memory bus are becoming significant bottlenecks. Even SMP (Symmetric MultiProcessor) systems are limited by their dependence on a processor and memory bus.

To allow computing performance to scale better, system designers are building smaller systems, called nodes, each containing their own processors and memory. These are connected together using a high-speed cache-coherent interconnect, forming a larger system. This architecture is known as ccNUMA, short for Cache-Coherent Non-Uniform Memory Access.

The cache-coherent interconnect may be a network switch, or the interconnect within a multi-core processor (e.g. the HyperTransport bus between the two cores of an AMD Opteron processors). Any processor in any node can access and use memory in other nodes through this interconnect. In multi-core processors, this allows one core to read from another core’s memory.

However, while memory accesses within the node itself (or local memory access by one core) is fast, access to memory in other nodes (or another core’s memory) is several times slower. Therefore, improving performance on a ccNUMA system would involve optimizations based on prioritizing threads to processors in the same node, and ensuring processors use memory closest to them.

Older operating systems like Windows 2000 are not capable of determining the design of the system, and therefore cannot perform such optimizations. However, newer operating systems like Windows Server 2003 can readily identify the system’s hardware topology, and allocate software threads and memory in a more optimal fashion.

This is where the ACPI Static Resource Affinity Table (SRAT) comes in. The SRAT stores topology information for all the processors and memory, describing the physical locations of the processors and memory in the system. It also describes what memory is hot-pluggable, and what is not.

The operating system scans the ACPI SRAT at boot time and uses the information to better allocate memory and schedule software threads for maximum performance. This BIOS feature controls whether the SRAT is made available to the operating system at boot up, or not.

When enabled, the BIOS will build the Static Resource Affinity Table (SRAT) and allow the operating system to access and use the information to optimize software thread allocation and memory usage.

When disabled, the BIOS will not build the Static Resource Affinity Table (SRAT). Alternative optimizations like Node Memory Interleaving can then be enabled.

If you are using an operating system that supports ACPI SRAT (e.g. Windows Server 2003, Windows XP SP2 with Physical Address Extensions or PAE enabled), it is recommended that you enable this BIOS feature to allow the operating system to dynamically allocate threads and memory according to the SRAT data.

Please note that you must disable Node Memory Interleave if you intend to enable this BIOS feature. Node Memory Interleave is a static optimization that cannot work in tandem with the dynamic optimizations that the operating system can perform using information from the ACPI SRAT.

If you are using an operating system that does not support ACPI SRAT (e.g. Windows 2000, Windows 98 ), it is recommended that you disable this BIOS feature, and possibly enable Node Memory Interleaving instead.

 

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